The present invention is related to the field of phase adjustment circuits, and more particularly to the field of tracking phase adjustment circuits adaptable for use in scanning video displays. The present invention also relates to scanning video display circuits utilizing the improved phase adjustment circuit of the present invention.
Typically scanning video display circuits are required to receive a horizontal sync signal, consisting of periodic sync pulses, and control the horizontal sweep of a cathode ray tube (CRT) electron beam. The instantaneous horizontal position of the electron beam with respect to the CRT screen is determined by controlling the excitation current in a CRT horizontal deflection yoke. While horizontal deflection control circuits are operative in response to the receipt of the periodic horizontal sync pulses, the video signals to be displayed are separately routed to video driver circuits of the CRT. This operation is conventional in typical television and scanning video display monitors.
Many times, a particular customer will generate the video signal which is to be displayed such that it will commence either prior to, later than or coincident with the horizontal sync signal leading edge whose occurrence determines the subsequent occurrence of horizontal video retrace and trace cycles of the electron gun. Thus video display circuits should preferably be adjustable such that the retrace and trace cycles can have their time occurrences adjusted with respect to the occurrence of the horizontal sync signal leading edge. This allows adjustment for proper centering of the video on the CRT screen. One technique of accomplishing this signal adjustment is to utilize a phase locked loop (PLL) which is preceded by an adjustable delay circuit which receives the horizontal sync signal and provides a delay signal in response thereto as one input to the PLL. The output of the PLL is utilized to generate a resultant signal which generally corresponds to the flyback (retrace) pulse which occurs during and as a result of the resetting of the horizontal scan. The flyback pulse is coupled, typically without inversion, as the other input to the phase locked loop such that an adjustable delayed edge of the delay signal, corresponding to but delayed with respect to the sync signal leading edge, and the leading edge of the flyback pulse are phase compared.
The above system has been utilized to implement a predetermined amount of positive delay such that the flyback pulse leading edge (at the start of retrace) will occur in response to a sync signal leading edge at a predetermined adjustable time after the occurrence of the horizontal sync signal leading edge. In other words, a positive delay phase adjustment is provided for the occurrence of the retrace pulse of the scanning video display monitor with respect to the occurrence of the horizontal sync leading edge. When the term "leading edge" is utilized referring to the horizontal sync pulse, of course it is understood that this can either be a rising or falling edge of the horizontal sync pulse.
While systems such as the above described system function satisfactorily in some applications, they are not readily usable in situations where the video signal to be displayed occurs either coincident with the occurrence of the leading edge of a horizontal sync pulse or prior to the occurrence of the leading edge of the horizontal sync pulse. In those cases a negative phase relationship adjustment between the occurrence of the retrace pulse and the occurrence of the horizontal sync pulse leading edge may be required, and the previous circuit can only implement such a result if a substantially long delay period is utilized. However, when such a long delay period is utilized, stability and video jitter problems occur which are accentuated if very high horizontal scan rates are to be utilized. Thus the prior scanning video phase adjustment circuits utilized for the hortizontal drive circuitry could not satisfactorily accommodate situations where the formatting of the video signal resulted in the video occurring prior to or at the occurrence of the leading edge of the horizontal sync pulse. The end result was that either totally different phase adjustment circuits must be generated depending upon which type of video format is to be received, or the video format must be changed. Requiring separate adjustment circuits depending upon which type of video format is to be received requires having different monitor circuits for each type of video format to be received and this is not an economical solution. Advising the end customer that he must alter his video format to correspond to the format desired by the video monitor is also not a satisfactory solution.